Testing of Asynchronous Designs by "Inappropriate" Means: Synchronous Approach
نویسندگان
چکیده
The roadblock to wide acceptance of asynchronous methodology is poor CAD support. Current asynchronous design tools require a significant re-education of designers, and their capabilities are far behind synchronous commercial tools. This paper considers the testing methodology for a particular subclass of asynchronous circuits (Null Convention Logic or NCL) that entirely relies on conventional CAD tools available at today’s market. It is shown that for acyclic NCL pipelines a test pattern generation for stuckat faults could be effectively solved through the construction and checking of the synchronous circuit with a set of faults “equivalent” to the original NCL circuit. This result is extended to arbitrary NCL structures by applying the partial scan technique to break computational loops. The method guarantees 100% stuck-at fault coverage in NCL systems, which is confirmed by experimental data.
منابع مشابه
Scan Test Strategy for Asynchronous-Synchronous Interfaces
In the next years, the well-known synchronous design style will not be able to keep pace with the increase of speed and capabilities of integration of advanced processes. Asynchronous design will become more and more common among digital designers, while synchronous-asynchronous interactions will emerge as a key issue in the future SoC designs. This paper will present test strategies for 2-phas...
متن کاملTesting Asynchronous Circuits: Help is on the Way!
Testing of asynchronous circuits is considered to be a difficult task. The presence of asynchronous components in an Integrated Circuit (IC), let alone the whole IC itself, sends shivers into any test manager. This general sense of difficulty can be attributed to lack of understanding, lack of interest, lack of support from various players in the testing game including Automated Test Equipment ...
متن کاملTowards Asynchronous A-D Conversion
Analogue to digital (AD) converters with a xed conversion time are subject to errors due to metastability. These errors will occur in all converter designs with a bounded time for decisions, and are potentially severe. We estimate the frequency of these errors in a successive approximation converter, and compare the results with asynchronous designs using both a fully speed-independent, and a b...
متن کاملAsynchronous Bypass Channel Routers
Network-on-Chip (NoC) designs have emerged as a replacement for traditional shared-bus designs for on-chip communications. Typically, these systems require fully balanced clock distribution trees to enable synchronous communication between all nodes on-chip, resulting in higher power consumption. One approach to reduce power consumption is to replace the balanced clock tree with a globally-asyn...
متن کاملNexus: an asynchronous crossbar interconnect for synchronous system-on-chip designs
Asynchronous circuits can provide an elegant and high performance interconnect solution for synchronous systemon-chip (SoC) designs with multiple clock domains. This “globally asynchronous, locally synchronous” (GALS) approach simplifies global timing and synchronization problems, improving performance, reliability, and development time. Fulcrum Microsystems’ SoC interconnect, “Nexus”, includes...
متن کاملذخیره در منابع من
با ذخیره ی این منبع در منابع من، دسترسی به آن را برای استفاده های بعدی آسان تر کنید
عنوان ژورنال:
دوره شماره
صفحات -
تاریخ انتشار 2002